VTUNEWS

M. S. Ramaiah School of Advanced Studies (MSRSAS) is organizing a three day seminar on “FPGAs for Signal Processing and Embedded Application” on 4^th, 5^th & 6^th

March 2010. The seminar information is given below for your kind reference. The contents will be extremely beneficial to the practicing engineers, professionals, academic staff and students.

 For details and Registration  Form

Three Day Seminar on 

" FPGAs for Signal Processing and Embedded Application"

Organized by

M. S. Ramaiah School of Advanced Studies

Date: 4^th, 5^th & 6^th March 2010
(Thursday, Friday & Saturday)

Venue: M. S. Ramaiah School of Advanced Studies, Bangalore

Overview:

Field Programmable Gate Arrays (FPGAs) are finding prominence in many applications such as complex signal processing, communication, networking and control systems. FPGAs have surpassed the ASICs by increasing gate counts by more than three orders of magnitude since their inception about two decades ago. Also, they have added high-speed I/Os, embedded memories, dedicated Phase-Locked Loops (PLLs), and embedded processors. An important aspect of FPGAs is the availability of pre-designed circuit blocks in the form of Intellectual Property (IP) that designers can license and integrate into their system. FPGA based system design is finding its place in many fields such as medical, automotive, industrial, commercial and military. FPGAs support reconfigurability of complex digital designs, multicore processors, DSP and communication block sets along with debugging capabilities. However, many of the current designs get implemented on microcontrollers and ASICs. One of the reasons for this is the lack of awareness and ease of working with the FPGA software and hardware tools. In order to exploit the capabilities of FPGAs and to develop complex applications with reduced time, it is required to understand and practice the correct methodology and follow the guidelines while working with FPGAs. Engineers need to know the shortcuts and industry practices for successfully designing applications using FPGAs. Also it is required to understand the software solutions and tools available for designing and debugging FPGAs. There is a frequent need to develop customized boards using FPGAs. This seminar is one such event which introduces and demonstrates the best practices of FPGA in industry.

Objectives:

• To discuss the challenges and opportunities in FPGA based system design

• To understand the basic/advanced FPGA architecture and FPGA design flow

• To design complex systems using FPGAs without HDLs and Implement the design with area   

   and timing optimization on FPGA

• To design, implement and debug signal processing and embedded applications on FPGAs

• To understand the challenges and solution procedures in developing FPGA based High Speed

   Boards

Who should attend?

Experienced Engineers, working professionals, faculties, vtu students (M.Tech. /B.E. / Diploma) and fresher

Prerequisites

Participants need to have basic understanding of digital circuits, HDLs, signal processing and embedded systems

Program Schedule

REGISTRATION FORM

M.S.RAMAIAH SCHOOL OF ADVANCED STUDIES
Gnanagangothri Campus,
New BEL Road , M.S.R Nagar,
Bangalore – 560 054, INDIA .
Telefax: 91-80-2360 5539, 2360 1983, 2360 4759
e-mail :  This e-mail address is being protected from spambots. You need JavaScript enabled to view it  
Website: www.msrsas.org

 Programme : “FPGAs for Signal Processing and Embedded Application”

Date: 4^th, 5^th & 6^th March 2010 (Thursday, Friday & Saturday)

Please register the following nominations

Name Designation

1)______________________________________________

2)______________________________________________

3)______________________________________________

4)______________________________________________

5)______________________________________________

We enclose Cheque / DD No:____________ dated_________for Rs._________ drawn in favour of M.S.Ramaiah School of Advanced Studies, Payable at Bangalore .

Nominated By

Name: _________________________________________

Designation: ____________________________________

Organization ____________________________________

Address: _______________________________________

_______________________________________________

_______________________________________________

Phone Nos:_______________________________________

Fax Nos:_________________________________________

E-Mail: __________________________________________

Signature with Seal
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